34 pin IDC male connector at the SUN SPARCengine motherboards.
The SROMBO connector is a 34-pin IDC male header found on SUN SPARCengine Ultra AXmp motherboards. It exposes the expansion ROM (“ROMBO”) interface — comprising 20 address lines (ADR0–ADR19), an 8-bit data bus (DAT0–DAT7), active-low read and write strobes, and a dedicated chip-select line (ROMBO_CS_L) — to allow factory programming and testing of on-board ROM devices. The connector is an internal, non-user-accessible header and carries TTL-compatible +5 V logic. It is not associated with any public industry standard and has no equivalent in the SBus (IEEE 1496-1993) specification.
| Pin | Name |
|---|---|
| 1 | ADR19 |
| 2 | VCC |
| 3 | ADR16 |
| 4 | ADR18 |
| 5 | ADR15 |
| 6 | ADR17 |
| 7 | ADR12 |
| 8 | ADR14 |
| 9 | ADR7 |
| 10 | ADR13 |
| 11 | ADR6 |
| 12 | ADR8 |
| 13 | ADR5 |
| 14 | ADR9 |
| 15 | ADR4 |
| 16 | ADR11 |
| 17 | ADR3 |
| 18 | RD_L |
| 19 | ADR2 |
| 20 | ADR10 |
| 21 | ADR1 |
| 22 | ROMBO_CS_L |
| 23 | ADR0 |
| 24 | DAT7 |
| 25 | DAT0 |
| 26 | DAT6 |
| 27 | DAT1 |
| 28 | DAT5 |
| 29 | DAT2 |
| 30 | DAT4 |
| 31 | GND |
| 32 | DAT3 |
| 33 | NC |
| 34 | WR_L |
Signals
- ADR0–ADR19 — 20-bit address bus; provides the full address space for the expansion ROM device.
- DAT0–DAT7 — 8-bit bidirectional data bus for ROM read and write operations.
- RD_L — active-low read strobe; asserted by the host to latch data from the ROM onto the data bus.
- WR_L — active-low write strobe; asserted by the host to program (write) data into the ROM device.
- ROMBO_CS_L — active-low chip select for the expansion ROM; enables the ROM for the current bus cycle.
- VCC — +5 V supply rail (TTL logic level).
- GND — ground reference.
- NC — not connected (pin 33).
Notes
The SROMBO header uses a standard 34-pin IDC (Insulation-Displacement Connector) footprint with a 2.54 mm pitch, identical to the physical form used for legacy floppy and ROM programmer cables. The signal assignment is specific to the SPARCengine Ultra AXmp board; this header is intended solely for SUN factory programming and test fixtures and is not a user-accessible expansion port. No voltage, timing, or electrical specifications beyond +5 V TTL logic are documented in publicly available sources. The closely related SROMBOlite connector (28-pin IDC) serves a similar purpose on the SPARCengine CP 1500 board but carries only 8 address lines (EB_ADR<0–7>) and includes additional signals for an on-board serial controller.
References
- SUN SPARCengine Ultra AXmp Manual (Sun Microsystems — primary source for SROMBO pinout; not freely available online)
- IEEE 1496-1993 — IEEE Standard for a Chip and Module Interconnect Bus: SBus