VME P2 Connector - 96 pin DIN (41612, Type C) 3 rows x 32 pins [Pitch 2.54mm (.100")] @ IEEE 1014-1987
The P2/J2 connector is the second backplane connector on 6U (double-height, 160 × 233 mm Eurocard) VMEbus boards, standardised under IEEE 1014-1987 and later ANSI/VITA 1-1994 (VME64). It uses the same 96-pin DIN 41612 Type C form factor as P1/J1 — three rows (A, B, C) of 32 positions at 2.54 mm pitch — but serves a different role: row B carries the eight upper address lines (A24–A31) and sixteen upper data lines (D16–D31) needed to extend the bus to full 32-bit address and data width, while rows A and C are entirely user-defined and may carry proprietary I/O, the VSB memory extension bus, or other secondary bus signals. 3U single-height boards connect only via P1/J1 and do not use P2/J2 at all.
| Pin # | Signal Name | Signal Name | Signal Name |
|---|---|---|---|
| Row A | Row B | Row C | |
| 1 | User Defined | +5v | User Defined |
| 2 | User Defined | GND | User Defined |
| 3 | User Defined | RETRY | User Defined |
| 4 | User Defined | A24 | User Defined |
| 5 | User Defined | A25 | User Defined |
| 6 | User Defined | A26 | User Defined |
| 7 | User Defined | A27 | User Defined |
| 8 | User Defined | A28 | User Defined |
| 9 | User Defined | A29 | User Defined |
| 10 | User Defined | A30 | User Defined |
| 11 | User Defined | A31 | User Defined |
| 12 | User Defined | GND | User Defined |
| 13 | User Defined | +5v | User Defined |
| 14 | User Defined | D16 | User Defined |
| 15 | User Defined | D17 | User Defined |
| 16 | User Defined | D18 | User Defined |
| 17 | User Defined | D19 | User Defined |
| 18 | User Defined | D20 | User Defined |
| 19 | User Defined | D21 | User Defined |
| 20 | User Defined | D22 | User Defined |
| 21 | User Defined | D23 | User Defined |
| 22 | User Defined | GND | User Defined |
| 23 | User Defined | D24 | User Defined |
| 24 | User Defined | D25 | User Defined |
| 25 | User Defined | D26 | User Defined |
| 26 | User Defined | D27 | User Defined |
| 27 | User Defined | D28 | User Defined |
| 28 | User Defined | D29 | User Defined |
| 29 | User Defined | D30 | User Defined |
| 30 | User Defined | D31 | User Defined |
| 31 | User Defined | GND | User Defined |
| 32 | User Defined | +5V | User Defined |
Notes
- P2/J2 is used only on 6U double-height Eurocard boards (160 × 233 mm); 3U single-height boards connect through P1/J1 only.
- The physical connector is a DIN 41612 Type C (also designated IEC 60603-2) with 96 contacts at 2.54 mm pitch, rated at 2 A per contact.
- Row B is fully defined by the VMEbus standard for bus use; rows A and C (64 pins total) are user-defined and available for I/O expansion, the VSB memory extension bus (IEEE 1988), or proprietary secondary buses.
- Pin B3 is shown as RETRY. This pin was RESERVED in the original IEEE 1014-1987 specification (bussed and terminated on backplanes but unassigned). RETRY was formally defined only in ANSI/VITA 1-1994 (VME64); boards implementing RETRY per VME64 remain backward compatible with IEEE 1014-1987 backplanes.
- VMEbus uses asynchronous handshaking — there is no central timing clock driving transfers; SYSCLK (on P1) is a 16 MHz utility clock only.
- The VMEbus signal drive types are:
- Open collector — BBSY*, BERR*, DTACK*, IACK*, SYSFAIL*, SYSRESET*, IRQ1*–IRQ7*, BR0*–BR3*.
- Three-state — AS*, DS0*, DS1*, RETRY*, LWORD*, WRITE*, AM0–AM5, A01–A31, D00–D31.
- Totem-pole — BCLR*, SYSCLK, IACKIN*, IACKOUT*, BG0IN*–BG3IN*, BG0OUT*–BG3OUT*.
Signals
- A24–A31 — Upper eight address lines (row B, pins 4–11); extend VMEbus addressing from A24 to full A32 (4.2 GB address space) when combined with A01–A23 on P1.
- D16–D31 — Upper sixteen data lines (row B, pins 14–21 and 23–30); extend the data bus to full D32 width for 32-bit transfers on 6U boards.
- RETRY* — Three-state output; signals that the current bus cycle should be retried by the master. Formally introduced in ANSI/VITA 1-1994 (VME64); was RESERVED in IEEE 1014-1987 (pin B3).
- +5 V — Logic supply voltage (row B, pins 1, 13, 32).
- GND — Ground return (row B, pins 2, 12, 22, 31).
- User Defined — All 32 pins of row A and all 32 pins of row C are user-defined; the standard imposes no signal assignment on these positions.
References
- VMEbus Frequently Asked Questions (FAQ)
- VMEbus P2/J2 User Defined Pins
- VMEbus Address and Data Sizing
- VITA Standards Access
- Motorola / Micrology VMEbus Specification Manual, Rev C.1, October 1985 (archived at bitsavers.org / Internet Archive)
- DIN 41612 Connectors — HARTING Technology Group