AGP = Accelerated Graphics Port
Accelerated Graphics Port (AGP) provides a dedicated high-speed path between the PC’s graphics controller and system memory, letting the controller read texture maps directly from system memory instead of caching them in limited local video memory. Developed by Intel and first specified in 1996 (AGP 1.0), it is derived from PCI but operates as an independent point-to-point port reserved for a single graphics card. AGP was the mainstream graphics interface from 1997 until the mid-2000s, when it was superseded by PCI Express. Successive revisions raised the transfer rate from 266 MB/s (1x) through 533 MB/s (2x) and 1066 MB/s (4x) to 2133 MB/s (8x).
AGP advantages
- Texture maps of unlimited size, detail, and realism can be employed.
- 3D applications will also run faster when the need to pre-fetch and cache textures in local video memory is eliminated. How much faster? Up to 12.6 times more frames per second.
- By minimizing the need for video memory, AGP helps OEMs control the costs of new PC designs.
- Video traffic will fly seamlessly across the AGP bus to the user’s screen.
- Systems will have more stability when bandwidth-intensive graphics and video traffic is removed from the PCI bus.
| Pin | Signal Name | Pin | Signal Name |
|---|---|---|---|
| A1 | +12 V dc | B1 | spare |
| A2 | spare | B2 | +5 V dc |
| A3 | Reserved * | B3 | +5 V dc |
| A4 | USB- | B4 | USB+ |
| A5 | Ground | B5 | Ground |
| A6 | INTA# | B6 | INTB# |
| A7 | RST# | B7 | CLK |
| A8 | GNT# | B8 | REQ# |
| A9 | VCC 3.3 | B9 | VCC 3.3 |
| A10 | ST1 | B10 | ST0 |
| A11 | Reserved | B11 | ST2 |
| A12 | PIPE# | B12 | RBF# |
| A13 | Ground | B13 | Ground |
| A14 | Spare | B14 | Spare |
| A15 | SBA1 | B15 | SBA0 |
| A16 | VCC 3.3 | B16 | VCC 3.3 |
| A17 | SBA3 | B17 | SBA2 |
| A18 | Reserved | B18 | SB_STB |
| A19 | Ground | B19 | Ground |
| A20 | SBA5 | B20 | SBA4 |
| A21 | SBA7 | B21 | SBA6 |
| A22 | Key | B22 | Key |
| A23 | Key | B23 | Key |
| A24 | Key | B24 | Key |
| A25 | Key | B25 | Key |
| A26 | AD30 | B26 | AD31 |
| A27 | AD28 | B27 | AD29 |
| A28 | VCC 3.3 | B28 | VCC 3.3 |
| A29 | AD26 | B29 | AD27 |
| A30 | AD24 | B30 | AD25 |
| A31 | Ground | B31 | Ground |
| A32 | Reserved | B32 | AD STB1 |
| A33 | C/BE3# | B33 | AD23 |
| A34 | Vddq 3.3 | B34 | Vddq 3.3 |
| A35 | AD22 | B35 | AD21 |
| A36 | AD20 | B36 | AD19 |
| A37 | Ground | B37 | Ground |
| A38 | AD18 | B38 | AD17 |
| A39 | AD16 | B39 | C/BE2# |
| A40 | Vddq 3.3 | B40 | Vddq 3.3 |
| A41 | FRAME# | B41 | IRDY# |
| A42 | Spare | B42 | Spare |
| A43 | Ground | B43 | Ground |
| A44 | Spare | B44 | Spare |
| A45 | VCC 3.3 | B45 | VCC 3.3 |
| A46 | TRDY# | B46 | DEVSEL# |
| A47 | STOP# | B47 | Vddq 3.3 |
| A48 | Spare | B48 | PERR# |
| A49 | Ground | B49 | Ground |
| A50 | PAR | B50 | SERR# |
| A51 | AD15 | B51 | C/BE1# |
| A52 | Vddq 3.3 | B52 | Vddq 3.3 |
| A53 | AD13 | B53 | AD14 |
| A54 | AD11 | B54 | AD12 |
| A55 | Ground | B55 | Ground |
| A56 | AD9 | B56 | AD10 |
| A57 | C/BE0# | B57 | AD8 |
| A58 | Vddq 3.3 | B58 | Vddq 3.3 |
| A59 | Reserved | B59 | AD STB0 |
| A60 | AD6 | B60 | AD7 |
| A61 | Ground | B61 | Ground |
| A62 | AD4 | B62 | AD5 |
| A63 | AD2 | B63 | AD3 |
| A64 | Vddq 3.3 | B64 | Vddq 3.3 |
| A65 | AD0 | B65 | AD1 |
| A66 | SMB1 | B66 | SMB0 |
- This reserved pin should be connected to Ground
Notes
- Voltage keying. AGP cards and slots are keyed by signalling voltage so a card cannot be inserted into an incompatible slot: 3.3 V (AGP 1.0, 1x/2x), 1.5 V (AGP 2.0, 4x) and 0.8 V signalling (AGP 3.0, 8x). A Universal card carries both notches and fits either a 3.3 V or a 1.5 V slot; the card declares its voltage to the chipset on the TYPEDET# pin (open = 3.3 V, grounded = 1.5 V).
- Speed grades. 1x = 266 MB/s, 2x = 533 MB/s, 4x = 1066 MB/s and 8x = 2133 MB/s; the faster grades use source-synchronous strobes (AD_STB, SB_STB) to clock several transfers per cycle.
- Point-to-point. Unlike the shared PCI bus, AGP connects a single graphics card to the chipset, which relaxes the timing budget and permits higher clock rates. It is not hot-pluggable, and the card seats at right angles to the board.
- IDSEL. The connector has no IDSEL pin; the card ties AD16 to its IDSEL input for PCI-style configuration.
- AGP Pro. A longer AGP Pro connector adds power contacts for high-end workstation cards; a standard AGP card fits an AGP Pro slot, but not the reverse.
Signals
- PIPE# — Pipelined request; the master enqueues full-width requests on the AD bus (an alternative to sideband addressing).
- SBA[7:0] — Sideband Address port carrying address and command from the card to the chipset.
- ST[2:0] — Status from the chipset’s arbiter (qualified by GNT#) telling the card what to do next.
- RBF# — Read Buffer Full; the card signals that it cannot currently accept low-priority read data.
- AD_STB0 / AD_STB1 — source-synchronous strobes timing AD[15:0] and AD[31:16] for 2x and faster transfers.
- SB_STB — strobe timing the sideband address bus.
- AD[31:0] / C/BE[3:0]# — multiplexed address/data and command/byte-enable lines, as on PCI.
- REQ# / GNT# — bus request and grant; GNT# also carries the ST[2:0] status.
- USB+ / USB- — optional USB pair routed through the connector on some boards.
- SMB0 / SMB1 — System Management Bus clock and data.
References
- Accelerated Graphics Port Interface Specification, Revision 1.0 (Intel, 1996) — signal definitions and the 66-pin (rows A/B) pin list.
- Accelerated Graphics Port Interface Specification, Revision 2.0 (Intel, 1998) — 4x / 1.5 V signalling, voltage keying and the AGP Pro connector.