The Apple Communication Slot (also known as Comm Slot or Comm Slot I) is a 112-pin proprietary internal expansion interface introduced by Apple Computer on the Macintosh LC 575 and 630 series in the early 1990s. Derived from the LC Processor Direct Slot (PDS) architecture, it was designed to accept low-cost add-in cards providing modem or Ethernet connectivity without requiring a full NuBus or PDS slot. The interface exposes a 32-bit data bus (IOD[0]–IOD[31]), a 32-bit address bus (A[0]–A[31]), 68040-family control signals, audio paths, and a serial channel (SCC port A), alongside +5 V, +12 V, and −5 V power rails. Comm Slot II, a PCI-based successor, debuted with the Performa 6360 and is electrically incompatible with Comm Slot I cards.
112 PIN CONNECTOR
| Pin | Name |
|---|---|
| 1 | Audio MODEM to Host |
| 2 | Audio Host to MODEM |
| 3 | Audio MH GND |
| 4 | MIC to MODEM |
| 5 | R/W* |
| 6 | DS* |
| 7 | BERR* |
| 8 | DSACK1* |
| 9 | DSACK0* |
| 10 | GND |
| 11 | IOSIZE0* |
| 12 | C16M |
| 13 | IOSIZE1* |
| 14 | GND |
| 15 | RESET* |
| 16 | Bus Grant-Sacramento |
| 17 | IOD[31] |
| 18 | IOD[30] |
| 19 | IOD[29] |
| 20 | IOD[28] |
| 21 | IOD[27] |
| 22 | IOD[26] |
| 23 | IOD[25] |
| 24 | IOD[24] |
| 25 | IOD[23] |
| 26 | IOD[22] |
| 27 | +5V |
| 28 | IOD[21] |
| 29 | IOD[20] |
| 30 | IOD[19] |
| 31 | IOD[18] |
| 32 | IOD[17] |
| 33 | IOD[16] |
| 34 | IOD[15] |
| 35 | IOD[14] |
| 36 | IOD[13] |
| 37 | IOD[12] |
| 38 | IOD[11] |
| 39 | IOD[10] |
| 40 | IOD[9] |
| 41 | IOD[8] |
| 42 | GND |
| 43 | IOD[7] |
| 44 | IOD[6] |
| 45 | IOD[5] |
| 46 | IOD[4] |
| 47 | IOD[3] |
| 48 | IOD[2] |
| 49 | IOD[1] |
| 50 | IOD[0] |
| 51 | BGACK* |
| 52 | Bus Request-Sacramento |
| 53 | IO_CS_TIMED* |
| 54 | IO_CS_DSACK* |
| 55 | +5V |
| 56 | Sacramento IRQ* |
| 57 | IOA[1] |
| 58 | IOA[0] |
| 59 | A[2] |
| 60 | A[3] |
| 61 | A[4] |
| 62 | A[5] |
| 63 | A[6] |
| 64 | A[7] |
| 65 | A[8] |
| 66 | A[9] |
| 67 | A[10] |
| 68 | A[11] |
| 69 | A[12] |
| 70 | GND |
| 71 | A[13] |
| 72 | A[14] |
| 73 | A[15] |
| 74 | A[16] |
| 75 | A[17] |
| 76 | A[18] |
| 77 | A[19] |
| 78 | A[20] |
| 79 | A[21] |
| 80 | A[22] |
| 81 | A[23] |
| 82 | A[24] |
| 83 | +5V |
| 84 | A[25] |
| 85 | A[26] |
| 86 | A[27] |
| 87 | A[28] |
| 88 | A[29] |
| 89 | A[30] |
| 90 | A[31] |
| 91 | CPU_AS* |
| 92 | GND |
| 93 | TRICKLE+5V |
| 94 | System wakeup |
| 95 | ‘040 bus clock |
| 96 | -5V |
| 97 | +12V |
| 98 | GND |
| 99 | spare |
| 100 | C32M |
| 101 | spare |
| 102 | GND |
| 103 | spare |
| 104 | spare |
| 105 | SCC port A enable |
| 106 | spare |
| 107 | TxDA |
| 108 | RxDA |
| 109 | RTSA* |
| 110 | CTSA* |
| 111 | DTRA* |
| 112 | DCDA* |
Notes
- (*) Active Low Signal
- Available on:
- Apple Macintosh 575 family
- Apple Macintosh 630 family
- Apple Macintosh 5200 family
- Apple Macintosh 5300 family
- Apple Performa 6200CD series
- Apple Performa 6300 series
- The Comm Slot I interface is electrically and mechanically incompatible with Comm Slot II (PCI-based), which appeared on the Performa 6360 and later models.
- The connector is a proprietary Apple design; no IEEE/ANSI/ISO standard governs it.
- The “Sacramento” label on pins 16, 52, and 56 refers to the Apple-internal codename for the LC 630 logic board controller ASIC.
- TRICKLE+5V (pin 93) and System wakeup (pin 94) support soft power-off and wake-from-sleep functions present on the 630 and 5x00 families.
- Audio pins 1–4 carry analogue audio between the host board and a communication card’s modem; the audio ground (pin 3) must be kept separate from digital ground to minimise interference.
Signals
- R/W* — Read/Write control line; low indicates a write cycle from the processor to the card.
- DS* — Data Strobe; qualifies the data bus during bus cycles.
- BERR* — Bus Error; asserted by the card or host to signal a bus fault condition.
- DSACK1*, DSACK0* — Data Transfer and Size Acknowledge; the card asserts these to terminate a bus cycle and indicate the port size of the responding device.
- IOSIZE0*, IOSIZE1* — I/O Size select lines; indicate the operand size requested by the processor.
- C16M — 16 MHz clock derived from the system crystal; available to the communication card for timing purposes.
- C32M — 32 MHz clock; higher-rate clock reference available on pin 100.
- ‘040 bus clock (pin 95) — The 68040 bus clock signal, typically 25 MHz on 630-family machines.
- RESET* — System reset; asserted during power-on reset and soft reset events.
- Bus Grant-Sacramento / Bus Request-Sacramento (pins 16, 52) — Bus arbitration signals between the host ASIC (Sacramento) and the communication card, allowing the card to request and be granted bus mastership.
- BGACK* — Bus Grant Acknowledge; asserted by the card after receiving a bus grant to confirm it has taken control of the bus.
- IO_CS_TIMED* — I/O Chip Select, timed mode; selects the card for fixed-duration (synchronous) bus cycles.
- IO_CS_DSACK* — I/O Chip Select, DSACK mode; selects the card for cycles that terminate via DSACK handshake.
- Sacramento IRQ* (pin 56) — Interrupt Request from the communication card to the Sacramento ASIC; active-low.
- CPU_AS* — Address Strobe from the CPU; indicates that a valid address is present on the address bus.
- IOD[0]–IOD[31] — 32-bit bidirectional I/O data bus connecting the host logic board to the communication card.
- IOA[0]–IOA[1] — Lower two address bits in the I/O address space; complement the main address bus for byte-lane selection.
- A[2]–A[31] — 68040-family address bus lines; together with IOA[0:1] provide the full 32-bit physical address.
- TRICKLE+5V (pin 93) — A low-current +5 V supply maintained even when the machine is in soft power-off state; used to preserve card state for wake-from-sleep.
- System wakeup (pin 94) — Signal from the card to the host to initiate a system wake event (e.g. incoming modem call).
- -5V (pin 96) — Negative 5 V supply rail.
- +12V (pin 97) — +12 V supply rail.
- SCC port A enable (pin 105) — Enables the Z8530 SCC serial channel A signals routed to the card.
- TxDA (pin 107) — Serial data transmit, SCC channel A.
- RxDA (pin 108) — Serial data receive, SCC channel A.
- RTSA* (pin 109) — Request To Send, SCC channel A; active-low.
- CTSA* (pin 110) — Clear To Send, SCC channel A; active-low.
- DTRA* (pin 111) — Data Terminal Ready, SCC channel A; active-low.
- DCDA* (pin 112) — Data Carrier Detect, SCC channel A; active-low; typically used by a modem card to signal carrier presence.
- spare (pins 99, 101, 103, 104, 106) — Reserved; unpopulated on all known shipping implementations.
References
- Apple TIL article 15081, “Communication Slot Specifications”, Apple Computer, Inc. (canonical specification; accessible via Wayback Machine archive)
- PowerMac 5200/6200 Developer Note, Apple Computer, Inc. (audio pin assignments, pp. 64–65)
- PowerMac 5400 Developer Note, Apple Computer, Inc. (audio pin assignments, pp. 58–59)