PCI Express (PCIe) add-in card and Mini Card connector pinouts: x1 slot (36 pins), Mini PCIe 52-pin edge connector, and signal comparison across form factors.
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PCI Express (PCIe) is a serial, point-to-point high-speed expansion bus standard governed by the PCI Special Interest Group (PCI-SIG), introduced in 2003 as the successor to the parallel PCI and AGP buses. Full-size PCIe add-in cards use card-edge connectors at 1.0 mm contact pitch in x1, x4, x8, and x16 lane widths (36, 64, 98, and 164 pins respectively), carrying differential TX/RX pairs alongside +12 V and +3.3 V power rails; the same connector supports Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s) signalling, defined in the PCIe Card Electromechanical Specification Rev 3.0 (July 2013). PCI Express Mini Card (Mini PCIe) is a compact form factor for laptop and embedded peripherals, using a 52-pin card-edge connector at 0.8 mm pitch and carrying one PCIe lane plus USB 2.0 signals; Full-Mini cards measure 30 × 51 mm and Half-Mini cards 30 × 26.8 mm, as specified in the PCI-SIG Mini Card Electromechanical Specification Rev 1.2.
PCI Express Card
Pin
Symbol
Type
Legend
1
gnd
2
usb d-
I/O
USB Data
3
usb d+
I/O
USB Data
4
cp usb#
O
Card use USB bus
5
rsvd0
Reserved
6
rsvd1
Reserved
7
smb clk
SM Bus Clock
8
smb data
SM Bus Data
9
1.5 volt
10
1.5 volt
11
wake#
O
Wake up main CPU from card
12
3.3 Volt aux
Provided when main CPU is off (support for WAKE)
13
pe rst#
I
Power Good (reset)
14
3.3 Volt
15
3.3 volt
16
clk req#
O
Clock Request - enable ICS9DB106
17
cp pe#
O
Card us PCI Express bus
18
refclk-
I
Clock input from buffer ICS9DB106
19
refclk+
I
Clock input from buffer ICS9DB106
20
gnd
21
PERn0
I
PCI Express RX -
22
PERp0
I
PCI Express RX +
23
gnd
24
PETn0
O
PCI Express TX -
25
PETp0
O
PCI Express TX +
26
gnd
Verified with Congatec design
PCI Express - 1-lane slot
Pin
Symbol
Type
Legend
a01
PRSNT#1
Hot-Plug presence detect
a02
+12V
a03
+12V
a04
gnd
a05
jtag2
JTAG - Clock
a06
jtag3
JTAG - Data In
a07
jtag4
JTAG - Data Out
a08
jtag5
JTAG - Mode Select
a09
3.3 Volt
a10
3.3 Volt
a11
PERST#
I
Power Good (Reset)
a12
gnd
a13
refclk+
I
Clock input from buffer ICS9DB106
a14
refclk-
I
Clock input from buffer ICS9DB106
a15
gnd
a16
PERp0
I
PCI Express RX +
a17
PERn0
I
PCI Express RX -
a18
gnd
b01
+12V
b02
+12V
b03
rsvd0
Reserved
b04
gnd
b05
smb clk
SM Bus Clock
b06
smb data
SM Bus Data
b07
gnd
b08
3.3 Volt
b09
jtag1
JTAG - Reset
b10
3.3 Volt aux
Provided when main CPU is off (support for WAKE)
b11
wake#
O
Wake up main CPU from card
b12
rsvd1
Reserved
b13
gnd
b14
PETp0
O
PCI Express TX +
b15
PETn0
O
PCI Express TX -
b16
gnd
b17
PRSNT#2
Hot-Plug presence detect
b18
gnd
Verified with PCI Express official specification
PCI Express Mini Card
Row
Pin
Symbol
Type
Legend
Status
0
1
WAKE#
0
3
COEX1
Function is OEM specific
changed
0
5
COEX2
Function is OEM specific
changed
0
7
CLKREQ#
O
Request to ICS9DB106 for clock signal, MiniCard can tie to ground. USB-only cards leave this open.
0
9
Gnd
0
11
REFCLK-
I
Clock input from buffer ICS9DB106
0
13
REFCLK+
I
Clock input from buffer ICS9DB106
0
15
Gnd
0
17
Reserved
Reserved for future SIM Card pin C8
0
19
Reserved
Reserved for future SIM Card pin C4
0
21
Gnd
0
23
PERn0
I
PCI Express RX -
0
25
PERp0
I
PCI Express RX +
0
27
Gnd
0
29
Gnd
0
31
PETn0
O
PCI Express TX -
0
33
PETp0
O
PCI Express TX +
0
35
Gnd
0
37
Gnd
changed
0
39
3.3Vaux
changed
0
41
3.3Vaux
changed
0
43
Gnd
changed
0
45
Reserved
0
47
Reserved
0
49
Reserved
0
51
Reserved
1
2
3.3 Vaux
changed
1
4
Gnd
1
6
1.5 Volt
1
8
UIM PWR
O
SIM Card
1
10
UIM_DATA
I/O
SIM Card
1
12
UIM_CLK
O
SIM Card
1
14
UIM_RESET
O
SIM Card
1
16
UIM_VPP
O
SIM Card
1
18
Gnd
1
20
W_DISABLE#
I
Wireless disable (active low)
changed
1
22
PERST#
I
Power Good (Reset)
1
24
3.3Vaux
1
26
Gnd
1
28
1.5Volt
1
30
SMB CLK
I
SM Bus Clock
1
32
SMB Data
I/O
SM Bus Data
1
34
Gnd
1
36
USB_D-
I/O
USB Data
1
38
USB_D+
I/O
USB Data
1
40
Gnd
1
42
LED_WWAN#
O
Active low, max 9mA
1
44
LED_WLAN#
O
Active low, max 9mA
1
46
LED_WPAN#
O
Active low, max 9mA
1
48
1.5Volt
1
50
Gnd
1
52
3.3Vaux
changed
Verified with PCI Express Mini Card Electromechanical Specification, 1.0, with ECN
Notes
The Mini PCIe connector has 52 pins arranged in two staggered rows at 0.8 mm pitch, with a 4-contact gap in each row acting as a mechanical key to prevent incorrect insertion.
Full-Mini Card dimensions are 30 mm × 51 mm; Half-Mini Card dimensions are 30 mm × 26.8 mm; both use the same 52-pin connector footprint.
3.3Vaux is always present, including when the host system is in a low-power or sleep state, enabling the WAKE# function without main power.
PERST# is asserted (active low) by the host to hold the card in reset until power is stable; it is deasserted to signal power-good and release the card.
The REFCLK+/- differential pair provides the 100 MHz reference clock sourced from a clock buffer on the host side; CLKREQ# allows the card to gate this clock off to reduce power consumption.
Mini PCIe COEX1/COEX2 are OEM-specific coexistence signals used, for example, to coordinate Bluetooth and Wi-Fi radio activity on combo modules; their function is not defined by the PCI-SIG specification.
UIM (Universal Identity Module) pins provide an embedded SIM card interface; they are present only on WWAN (mobile broadband) Mini PCIe cards.
For full-size PCIe x1 slots, the connector has 36 pins (18 per side A and B). Larger lane-width connectors have 64 (x4), 98 (x8), or 164 (x16) pins, all at 1.0 mm pitch.
PCIe is backward and forward compatible within the same connector family: an x1 card operates in an x16 slot at x1 speed; an x16 card in an x8 slot negotiates to x8 speed.
Signals
PERn0 / PERp0 — PCIe receive differential pair (card receives data from host), negative and positive conductors.
PETn0 / PETp0 — PCIe transmit differential pair (card transmits data to host), negative and positive conductors.
REFCLK- / REFCLK+ — 100 MHz differential reference clock input from the host clock buffer.
CLKREQ# — Clock request output (active low); asserted by the card to request that the host enable the reference clock.
PERST# — PCIe reset input (active low); deasserted by the host to release the card from reset once power rails are stable.
WAKE# — Wake output (active low); asserted by the card to wake the host system from a low-power state.
SMB CLK / SMB Data — System Management Bus clock and bidirectional data lines for out-of-band management.
3.3Vaux — 3.3 V auxiliary power supply, present even when main system power is off; supports WAKE# and card standby functions.
1.5 Volt — 1.5 V supply rail for card core logic.
+12V — 12 V supply rail (full-size PCIe slot only).
3.3 Volt — 3.3 V main supply rail.
W_DISABLE# — Wireless disable input (active low, Mini PCIe only); asserted by the host to disable the card’s radio transmitter, for example when required by aviation regulations.
COEX1 / COEX2 — OEM-defined coexistence signals (Mini PCIe only); function varies by module and platform implementation.
LED_WWAN# / LED_WLAN# / LED_WPAN# — Active-low LED drive outputs for WWAN, WLAN, and WPAN status indicators respectively (max 9 mA); Mini PCIe only.
CP PE# — Card-present for PCI Express bus (ExpressCard form factor); signals to the host that the card uses the PCIe interface.
CP USB# — Card-present for USB bus (ExpressCard form factor); signals to the host that the card uses the USB interface.
PRSNT1# / PRSNT2# — Presence-detect pins (full-size PCIe slot); the add-in card shorts these together to signal its presence and enable hot-plug detection.