The PC Card (PCMCIA) interface is a 68-pin card-edge connector standardised by the Personal Computer Memory Card International Association (PCMCIA) and JEITA, with all connector and electrical details defined in the PC Card Standard. Cards measure 85.6 mm × 54.0 mm in all variants, differing only in thickness: Type I (3.3 mm), Type II (5.0 mm), and Type III (10.5 mm). The 16-bit interface, introduced with PCMCIA 2.x, supports 5 V and 3.3 V supply voltages and an 8- or 16-bit data bus, primarily for memory cards and modems. CardBus (introduced in PC Card Standard 5.0, 1995) extended the same 68-pin socket to a 32-bit, 33 MHz, 3.3 V-only bus with bus mastering and a maximum throughput of 132 MB/s; CardBus cards are distinguished by a gold ridge on the dorsal surface and a shallower keying notch that prevents them from seating in 16-bit-only sockets. The final revision of the standard, PC Card Standard Release 8.0 (PCMCIA/JEITA, April 2001), added the CardBay interface (USB and IEEE 1394 over the PC Card slot) and a 1.8 V core-voltage definition.
68 PIN MALE at the controller
68 PIN FEMALE at the peripherals
| Pin | Name | Dir | Description |
|---|---|---|---|
| 1 | GND | - | Ground |
| 2 | D3 | IN/OUT | Data 3 |
| 3 | D4 | IN/OUT | Data 4 |
| 4 | D5 | IN/OUT | Data 5 |
| 5 | D6 | IN/OUT | Data 6 |
| 6 | D7 | IN/OUT | Data 7 |
| 7 | /CE1 | OUT | Card Enable 1 |
| 8 | A10 | OUT | Address 10 |
| 9 | /OE | OUT | Output Enable |
| 10 | A11 | OUT | Address 11 |
| 11 | A9 | OUT | Address 9 |
| 12 | A8 | OUT | Address 8 |
| 13 | A13 | OUT | Address 13 |
| 14 | A14 | OUT | Address 14 |
| 15 | /WE:/P | OUT | Write Enable : Program |
| 16 | /READY:/IREQ | IN | Ready : Busy (IREQ) |
| 17 | VCC | OUT | +5V |
| 18 | VPP1 | OUT | Programming Voltage (EPROM) |
| 19 | A16 | OUT | Address 16 |
| 20 | A15 | OUT | Address 15 |
| 21 | A12 | OUT | Address 12 |
| 22 | A7 | OUT | Address 7 |
| 23 | A6 | OUT | Address 6 |
| 24 | A5 | OUT | Address 5 |
| 25 | A4 | OUT | Address 4 |
| 26 | A3 | OUT | Address 3 |
| 27 | A2 | OUT | Address 2 |
| 28 | A1 | OUT | Address 1 |
| 29 | A0 | OUT | Address 0 |
| 30 | D0 | IN/OUT | Data 0 |
| 31 | D1 | IN/OUT | Data 1 |
| 32 | D2 | IN/OUT | Data 2 |
| 33 | /WP:/IOIS16 | IN | Write Protect : IOIS16 |
| 34 | GND | - | Ground |
| 35 | GND | - | Ground |
| 36 | /CD1 | IN | Card Detect 1 |
| 37 | D11 | IN/OUT | Data 11 |
| 38 | D12 | IN/OUT | Data 12 |
| 39 | D13 | IN/OUT | Data 13 |
| 40 | D14 | IN/OUT | Data 14 |
| 41 | D15 | IN/OUT | Data 15 |
| 42 | /CE2 | OUT | Card Enable 2 |
| 43 | /VS1 | OUT | Refresh |
| 44 | /IORD | ? | I/O Read |
| 45 | /IOWR | ? | I/O Write |
| 46 | A17 | OUT | Address 17 |
| 47 | A18 | OUT | Address 18 |
| 48 | A19 | OUT | Address 19 |
| 49 | A20 | OUT | Address 20 |
| 50 | A21 | OUT | Address 21 |
| 51 | VCC | OUT | +5V |
| 52 | VPP2 | OUT | Programming Voltage 2 (EPROM) |
| 53 | A22 | OUT | Address 22 |
| 54 | A23 | OUT | Address 23 |
| 55 | A24 | OUT | Address 24 |
| 56 | A25 | OUT | Address 25 |
| 57 | /VS2 | ? | RFU |
| 58 | RESET | ? | RESET |
| 59 | /WAIT | ? | WAIT |
| 60 | /INPACK | ? | |
| 61 | /REG | OUT | Register Select |
| 62 | /BVD2:SPKR | IN | Battery Voltage Detect 2 : SPKR |
| 63 | /BVD1:STSCHG | IN | Battery Voltage Detect 1 : STSCHG |
| 64 | D8 | IN/OUT | Data 8 |
| 65 | D9 | IN/OUT | Data 9 |
| 66 | D10 | IN/OUT | Data 10 |
| 67 | /CD2 | IN | Card Detect 2 |
| 68 | GND | - | Ground |
Notes
- Direction is controller (computer) relative to the PCMCIA card.
- The connector has two rows of 34 contacts at 1.27 mm (0.050 in) pitch.
- VCC (pins 17 and 51) supplies +5 V in 16-bit mode; 3.3 V operation is also defined. CardBus cards operate at 3.3 V only.
- VPP1 (pin 18) and VPP2 (pin 52) supply the optional programming voltage (typically +12 V) for EPROM-type memory cards; they may be left unconnected when not required.
- /VS1 (pin 43) and /VS2 (pin 57) are voltage-sense pins used by the card to signal its required supply voltage to the host; /VS2 is Reserved for Future Use (RFU) in 16-bit mode.
- /IORD (pin 44) and /IOWR (pin 45) are host-driven strobes for I/O-mapped access; direction is OUT from the controller.
- /INPACK (pin 60) is driven low by the card to indicate that the I/O port address is decoded by the card (Input Acknowledge); it is an IN signal from the controller’s perspective.
- RESET (pin 58) is driven by the host (OUT) to reset the card; /WAIT (pin 59) is driven by the card (IN to host) to extend a bus cycle.
- /WP:/IOIS16 (pin 33) carries Write Protect in memory mode and IOIS16 (16-bit I/O port select) in I/O mode.
- /READY:/IREQ (pin 16) signals Ready/Busy in memory mode and acts as an interrupt request line (IREQ) in I/O mode.
- /BVD1:STSCHG (pin 63) and /BVD2:SPKR (pin 62) carry Battery Voltage Detect signals in memory mode; in I/O mode they carry Status Changed (/STSCHG) and audio speaker output (SPKR) respectively.
- CardBus (32-bit) cards use the same 68-pin socket but are keyed to prevent insertion into 16-bit-only hosts; they add bus mastering and support a maximum throughput of 132 MB/s.
Signals
- GND — Ground reference (pins 1, 34, 35, 68).
- D0–D15 — 16-bit bidirectional data bus; D0–D7 form the lower byte, D8–D15 the upper byte. In 8-bit mode only D0–D7 are used.
- A0–A25 — 26-bit address bus, driven by the host controller; supports addressing up to 64 MB of linear card address space.
- /CE1 — Card Enable 1 (active-low); selects even-byte (D0–D7) access.
- /CE2 — Card Enable 2 (active-low); selects odd-byte (D8–D15) access and is used in 16-bit transfers alongside /CE1.
- /OE — Output Enable (active-low); strobes data from card to host in memory read cycles.
- /WE:/P — Write Enable / Program (active-low); asserted by the host during memory write or flash-programming cycles.
- /READY:/IREQ — Ready/Busy in memory mode (card drives high when ready); Interrupt ReQuest in I/O mode (card asserts low to request service).
- VCC — Supply voltage (pins 17 and 51); +5 V in standard 16-bit mode; +3.3 V for low-voltage cards.
- VPP1, VPP2 — Programming/erase voltage for EPROM or flash memory (pins 18 and 52); typically +12 V when used, otherwise tied to VCC or left open.
- /WP:/IOIS16 — Write Protect (memory mode, active-low) or IOIS16 (I/O mode, driven low by card to indicate a 16-bit I/O port).
- /CD1, /CD2 — Card Detect 1 and 2 (pins 36 and 67); both are grounded on the card, allowing the host to detect card insertion.
- /VS1, /VS2 — Voltage Sense pins (pins 43 and 57) driven by the card to signal its required Vcc to the host. /VS2 is RFU in 16-bit mode but used for CardBus voltage signalling.
- /IORD — I/O Read strobe (active-low); asserted by the host to read from a card I/O register.
- /IOWR — I/O Write strobe (active-low); asserted by the host to write to a card I/O register.
- RESET — Host-driven reset signal; forces the card to its initial state.
- /WAIT — Wait state request (active-low); driven by the card to extend a memory or I/O bus cycle when it cannot respond within the standard timing window.
- /INPACK — Input Acknowledge (active-low); card drives low to confirm it has decoded the presented I/O address, enabling the host to complete the read.
- /REG — Register Select (active-low); distinguishes attribute-memory (CIS) accesses from common-memory or I/O accesses.
- /BVD2:SPKR — Battery Voltage Detect 2 in memory mode; audio speaker signal in I/O mode.
- /BVD1:STSCHG — Battery Voltage Detect 1 in memory mode; Status Changed interrupt in I/O mode (active-low, card drives when status changes).