CD32 Expansion-port

Commodore CD32 182-pin expansion port (MCA form factor) carrying the AGA system bus, RGB video, digital audio, and genlock signals for FMV and keyboard/drive expansion modules.

The Commodore CD32 expansion port is a 182-pin connector sharing the same physical form factor as the IBM Micro Channel Architecture (MCA) connector. Introduced with the CD32 games console in 1993, it exposes the full AGA chipset bus — the same architecture used in the Amiga 1200 and Amiga 4000 — along with RGB analogue video taken directly from the digital-to-analogue converter outputs, digital audio input for mixing external MPEG or FMV audio with the CD audio and Amiga audio streams, and genlock signals. The port was designed primarily to accept the Full Motion Video (FMV) MPEG cartridge and SX-1/SX-32 type expansion units that added a keyboard, floppy drive, IDE interface, and serial/parallel ports to the otherwise console-only machine.

182 PIN CONNECTOR (SAME AS MCA) at the computer

CD32 Expansion-port connector diagram

PinNameDescriptionComment
1A31Address 31Probably not connected since 68EC020
2A30Address 30Probably not connected since 68EC020
3A29Address 29Probably not connected since 68EC020
4A28Address 28Probably not connected since 68EC020
5A27Address 27Probably not connected since 68EC020
6A26Address 26Probably not connected since 68EC020
7A25Address 25Probably not connected since 68EC020
8A24Address 24
9DGNDData Ground
10VCC+5 VDC
11A23Address 23
12A22Address 22
13A21Address 21
14A20Address 20
15A19Address 19
16A18Address 18
17A17Address 17
18A16Address 16
19DGNDData Ground
20VCC+5 VDC
21A15Address 15
22A14Address 14
23A13Address 13
24A12Address 12
25A11Address 11
26A10Address 10
27A9Address 9
28A8Address 8
29DGNDData Ground
30VCC+5 VDC
31A7Address 7
32A6Address 6
33A5Address 5
34A4Address 4
35A3Address 3
36A2Address 2
37A1Address 1
38A0Address 0
39DGNDData Ground
40VCC+5 VDC
41D31Data 31
42D30Data 30
43D29Data 29
44D28Data 28
45D27Data 27
46D26Data 26
47D25Data 25
48D24Data 24
49DGNDData Ground
50VCC+5 VDC
51D23Data 23
52D22Data 22
53D21Data 21
54D20Data 20
55D19Data 19
56D18Data 18
57D17Data 17
58D16Data 16
59DGNDData Ground
60VCC+5 VDC
61D15Data 15
62D14Data 14
63D13Data 13
64D12Data 12
65D11Data 11
66D10Data 10
67D9Data 9
68D8Data 8
69DGNDData Ground
70VCC+5 VDC
71D7Data 7
72D6Data 6
73D5Data 5
74D4Data 4
75D3Data 3
76D2Data 2
77D1Data 1
78D0Data 0
79DGNDData Ground
80VCC+5 VDC
81/IPL2Interrupt Priority Level 2
82/IPL1Interrupt Priority Level 1
83/IPL0Interrupt Priority Level 0
84
85/RSTReset
86/HALTHalt
87/ECSECS??
88/OCSOCS??
89SIZE1Size 1Indicates number of bytes remaining to transfer
90SIZE0Size 0Indicates number of bytes remaining to transfer
91/ASAddress Strobe
92/DSData Strobe
93/R/WRead/Write
94/BERRBus Error
95
96/AVECAutovector ReqAutovector request during interrupt acknowledge
97/DSACK1Data Ack 1Data transfer and size acknowledge
98/DSACK0Data Ack 0Data transfer and size acknowledge
99CPUCLK_A
100
101DGNDData Ground
102VCC+5 VDC
103FC2Function Codes 2
104FC1Function Codes 1
105FC0Function Codes 0
106
107
108
109
110
111/CPU_BRCPU bus request??
112/EXP_BGExpansion bus granted??
113/CPU_BGCPU bus granted??
114/EXP_BRExpansion bus request??
115
116
117/PUNT
118/RESET68020 RESET
119/INT2Interrupt 2Generate a level 2 interrupt
120/INT6Interrupt 2Generate a level 6 interrupt
121/KB_CLOCKKeyboard clock
122/KB_DATAKeyboard data
123/FIRE0Fire Button 0??
124/FIRE1Fire Button 1??
125/LEDPower On LED ??
126/ACTIVEDisk active LED
127/RXDSerial ReceiveSerial data in
128/TXDSerial TransmitSerial data out
129/DKRDFloppy interface (Paula?)
130/DKWDFloppy interface (Paula?)
131SYSTEM
132/DKWEFloppy interface (Paula?)
133CONFIG_OUT
134
135DGNDData Ground
136+12V+12V DC
137DGNDData Ground
138+12V+12V DC
13917MHZFor FMV interface ??
140EXT_AUDIOFor FMV interface ??
141DA_DATAFor FMV interface ??
142/MUTEFor FMV interface ??
143DA_LRCLKFor FMV interface ??
144DA_BCLKFor FMV interface ??
145DGNDData Ground
146VCC+5 VDC
147DRDigital Red
148DGDigital Green
149DBDigital Blue
150DIDigital Intensity
151/PIXELSW_EXT
152/PIXELSW
153/BLANK
154PIXELCLKPixelclockFor manipulating RBG data
155DGNDData Ground
156VCC+5 VDC
157/CSYNCComposite syncNot buffered.
158CCK_BColor clock ??
159/HSYNCHorizontal sync
160/VSYNCVertical sync
161VGNDVideo ground
162VGNDVideo ground
163AR_EXTAnalog Red External
164ARAnalog Red
165AG_EXTAnalog Green External
166AGAnalog Green
167AB_EXTAnalog Blue External
168ABAnalog Blue
169VGNDVideo ground
170VGNDVideo ground
171/NTSC
172/XCLKENEnable External video clock(Genlock)
173XCLKExternal video clock(Genlock)
174/EXT_VIDEOExternal VideoDisable internal video interfaces
175DGNDData Ground
176VCC+5 VDC
177AGNDAudio Ground
178+12V+12V DC
179LEFT_EXTLeft sound External
180LEFTLeft sound
181RIGHT_EXTRight sound External
182RIGHTRight sound

Notes

The connector is mechanically identical to the IBM MCA (Micro Channel Architecture) edge connector at 182 pins, though the signal assignments are entirely Commodore-specific. The CD32 uses a 68EC020 processor running at approximately 14 MHz; address lines A31–A24 are present on the connector but are not driven by the 68EC020 (which has only a 24-bit physical address bus) and are most likely unconnected. All logic signals are 5 V TTL-compatible. Power rails available are +5 V (multiple pins) and +12 V; expansion units must not exceed the current budget of the CD32’s internal supply. The RGB analogue video signals (AR, AG, AB and their _EXT counterparts) are taken directly from the AGA DAC outputs and are not buffered at the connector, so expansion units performing genlock or overlay operations must provide their own signal conditioning.

Signals

  • A31–A0 — 32-bit address bus from the 68EC020; A31–A24 are likely unconnected internally due to the EC020’s 24-bit physical address limit
  • D31–D0 — 32-bit data bus
  • DGND — digital ground reference for bus signals
  • VCC — +5 V DC supply for expansion logic
  • /IPL2, /IPL1, /IPL0 — active-low interrupt priority level inputs to the 68EC020, encoding the current interrupt level
  • /RST — system reset signal
  • /HALT — processor halt signal
  • /ECS, /OCS — chipset compatibility identification signals (Enhanced Chip Set / Original Chip Set select lines; exact function on AGA CD32 uncertain)
  • SIZE1, SIZE0 — indicate the number of bytes remaining to be transferred in the current bus cycle (68020 dynamic bus sizing)
  • /AS — address strobe; asserted when the address bus contains a valid address
  • /DS — data strobe; asserted when the data bus is valid (write) or to request data (read)
  • /R/W — read/write direction line; high = read, low = write
  • /BERR — bus error; asserted to signal an error condition on the current bus cycle
  • /AVEC — autovector request; asserted during interrupt acknowledge to request an autovector rather than an externally supplied vector
  • /DSACK1, /DSACK0 — data transfer and size acknowledge lines used by the 68020 for dynamic bus sizing and to terminate a bus cycle
  • CPUCLK_A — CPU clock signal (approximately 14 MHz)
  • FC2, FC1, FC0 — function code outputs from the 68EC020 indicating the address space type of the current bus cycle
  • /CPU_BR — CPU bus request; used by an expansion device to request mastership of the local bus
  • /EXP_BG — expansion bus grant; asserted by the CPU to grant bus mastership to a requesting expansion device
  • /CPU_BG — CPU bus grant output
  • /EXP_BR — expansion bus request; alternate bus request line for expansion devices
  • /PUNT — signal allowing an expansion device to pass a bus cycle back to the on-board logic
  • /RESET — 68020 RESET instruction output; can be used to reset peripherals
  • /INT2 — generates a level 2 interrupt to the processor
  • /INT6 — generates a level 6 interrupt to the processor
  • /KB_CLOCK — keyboard clock line (used by SX-1/SX-32 type keyboard expansion units)
  • /KB_DATA — keyboard data line
  • /FIRE0, /FIRE1 — joystick fire button inputs (exact routing uncertain)
  • /LED — power-on LED control (exact function uncertain)
  • /ACTIVE — floppy/disk activity LED
  • /RXD — serial receive data input
  • /TXD — serial transmit data output
  • /DKRD — floppy read data (Paula chip interface)
  • /DKWD — floppy write data (Paula chip interface)
  • SYSTEM — system signal (function not fully documented)
  • /DKWE — floppy write enable (Paula chip interface)
  • CONFIG_OUT — AutoConfig daisy-chain output; allows self-configuring expansion cards to be sequentially mapped into the Amiga address space during boot
  • +12V — +12 V DC supply
  • 17MHZ — 17 MHz clock, provided for the FMV (Full Motion Video) MPEG module interface
  • EXT_AUDIO — external audio input for mixing MPEG/FMV audio with the CD and Amiga audio streams
  • DA_DATA — digital audio serial data (I²S-style interface for FMV audio)
  • /MUTE — audio mute control (FMV interface)
  • DA_LRCLK — digital audio left/right word clock (FMV interface)
  • DA_BCLK — digital audio bit clock (FMV interface)
  • DR, DG, DB — digital red, green, blue video signals from the AGA chipset
  • DI — digital intensity/brightness signal
  • /PIXELSW_EXT — external pixel switch input (genlock/overlay use)
  • /PIXELSW — pixel switch output
  • /BLANK — composite blank signal
  • PIXELCLK — pixel clock for synchronising manipulation of the RGB data stream
  • /CSYNC — composite sync output; not buffered at the connector
  • CCK_B — colour clock (3.58 MHz NTSC or PAL equivalent)
  • /HSYNC — horizontal sync
  • /VSYNC — vertical sync
  • VGND — video ground reference for analogue video signals
  • AR_EXT, AG_EXT, AB_EXT — external analogue red, green, blue inputs for genlock overlay mixing
  • AR, AG, AB — analogue red, green, blue outputs from the AGA DAC; taken directly from the converter leads
  • /NTSC — NTSC/PAL mode identifier signal
  • /XCLKEN — enable external video clock input (genlock)
  • XCLK — external video clock input (genlock reference)
  • /EXT_VIDEO — when asserted, disables the CD32’s internal video output interfaces
  • AGND — audio ground reference
  • LEFT_EXT, RIGHT_EXT — external left and right analogue audio inputs for mixing
  • LEFT, RIGHT — left and right analogue audio outputs

References

Category:Buses Connectors