Amiga 1200 CPU-port

The Amiga 1200 trapdoor CPU expansion connector is a 150-pin card edge slot at 50 mil pitch, carrying the 68EC020 32-bit data bus at 14 MHz.

The Amiga 1200 CPU port — commonly called the trapdoor slot — is a 150-pin card edge connector (male) located on the underside of the PCB, accessible via a removable bottom panel. Specified in the Commodore-Amiga A1200/A1200HD System Functional Specification (Revision 1.6, October 1992), it exposes the full 32-bit data bus and 24-bit address bus of the Motorola 68EC020 processor running at 14 MHz. The connector is intended for processor accelerator cards, fast RAM expansion, and DMA SCSI controllers, and its fine 50 mil (0.050 inch) pin pitch distinguishes it from the coarser Zorro II/III bus connectors used in desktop Amiga models.

Amiga 1200 CPU-port connector diagram

PinNameDescription
1n/cReserved
2n/cReserved
3n/cReserved
4n/cReserved
5n/cReserved
6n/cReserved
7n/cReserved
8n/cReserved
9GNDGround
10+5V+5 Volts DC
11A23Address 23
12A22Address 22
13A21Address 21
14A20Address 20
15A19Address 19
16A18Address 18
17A17Address 17
18A16Address 16
19GNDGround
20+5V+5 Volts DC
21A15Address 15
22A14Address 14
23A13Address 13
24A12Address 12
25A11Address 11
26A10Address 10
27A9Address 9
28A8Address 8
29GNDGround
30+5V+5 Volts DC
31A7Address 7
32A6Address 6
33A5Address 5
34A4Address 4
35A3Address 3
36A2Address 2
37A1Address 1
38A0Address 0
39GNDGround
40+5V+5 Volts DC
41D31Data 31
42D30Data 30
43D29Data 29
44D28Data 28
45D27Data 27
46D26Data 26
47D25Data 25
48D24Data 24
49GNDGround
50+5V+5 Volts DC
51D23Data 23
52D22Data 22
53D21Data 21
54D20Data 20
55D19Data 19
56D18Data 18
57D17Data 17
58D16Data 16
59GNDGround
60+5V+5 Volts DC
61D15Data 15
62D14Data 14
63D13Data 13
64D12Data 12
65D11Data 11
66D10Data 10
67D9Data 9
68D8Data 8
69GNDGround
70+5V+5 Volts DC
71D7Data 7
72D6Data 6
73D5Data 5
74D4Data 4
75D3Data 3
76D2Data 2
77D1Data 1
78D0Data 0
79GNDGround
80+5V+5 Volts DC
81/IPL2
82/IPL1
83/IPL0
84n/cReserved
85/RSTReset
86/HLTHalt
87n/cReserved
88n/cReserved
89SIZE1
90SIZE0
91/ASAddress Strobe
92/DSData Strobe
93R/WRead/Write
94/BERRBus Error
95n/cReserved
96/AVEC
97/DSACK1
98/DSACK2
99CPUCKLA
100ECLOCKEClock pulse
101GNDGround
102+5V+5 Volts DC
103FC2Processor Status 2
104FC1Processor Status 1
105FC0Processor Status 0
106/RMC
107n/cReserved
108n/cReserved
109n/cReserved
110n/cReserved
111/BRSlot specific Bus Arbitration
112/BGSlot specific Bus Arbitration
113n/cReserved
114/BOSS
115/FPUCSFPU Chip select
116/FPUSENSEFPU Sense
117CCKA
118/RESETReset
119GNDGround
120+5V+5 Volts DC
121/NETCS
122/SPARECS
123/RTCCSRealtime Clock Chip select
124/FLASH
125/REG
126/CCENA
127/WAIT
128/KBRESETKeyboard reset
129/IORDIO Read
130/IOWRIO Write
131/OEOutput enable
132/WE
133/OVR/DTACK Override
134XRDYExternal Ready
135/ZORRO
136/WIDE
137/INT2Interrupt level 2
138/INT6Interrupt level 6
139GNDGround
140+5V+5 Volts DC
141SYSTEM1System1 Ground
142SYSTEM0System0 Ground
143/xRxD
144/xTxD
145/CONFIG OUT
146AGNDAudio Ground
147ALEFTAudio Left
148ARIGHTAudio Right
149+12V+12 Volts DC
150-12V-12 Volts DC

Notes

  • The connector is a card edge type (male) with 50 mil (0.050 inch) pin spacing — significantly finer than the 100 mil pitch used on the Zorro II/III bus connectors in the A2000/A3000/A4000.
  • Expansion cards mount upside-down in the L-shaped internal space beneath the A1200 motherboard, in a manner similar to the earlier A601 memory expansion for the A600.
  • Power available to expansion cards is limited: +5 V at up to 250 mA across 11 pins, +12 V at 25 mA on one pin, and −12 V at 25 mA on one pin, with 11 GND pins.
  • The CPU fitted in the A1200 is the 68EC020, a cost-reduced variant of the 68020 that omits the external cache control signals and restricts the address bus to 24 bits (A23–A0) despite the processor’s internal 32-bit address capability.
  • System clock (_CPUCLK_A) runs at 14 MHz; the colour clock (CCK_A) runs at approximately 3.58 MHz.
  • Pin 99 (CPUCKLA) and pin 117 (CCKA) carry the CPU clock and colour clock signals respectively to the expansion card.
  • The /CONFIG OUT signal on pin 145 is part of the AutoConfig daisy-chain used by Zorro-style self-configuring cards.
  • Signals marked n/c (pins 1–8, 84, 87, 88, 95, 107–110, 113) are reserved and should not be driven.

Signals

  • A23–A0 — 24-bit address bus from the 68EC020 processor
  • D31–D0 — 32-bit data bus; full longword width exposed to expansion cards
  • FC2–FC0 — Processor function code lines indicating the type of bus cycle (supervisor/user, data/program/CPU space)
  • _AS — Address Strobe: asserted by the CPU when a valid address is present on the bus
  • _DS — Data Strobe: asserted to indicate valid data on a write or to request data on a read
  • R/_W — Read/Write direction line; high = read, low = write
  • _DSACK0, _DSACK1 — Data and Size Acknowledge inputs to the CPU; used by peripherals to signal transfer completion and port width (pins 97 and 98, labelled /DSACK1 and /DSACK2 in the original table)
  • _IPL2–_IPL0 — Interrupt Priority Level inputs to the CPU (pins 81–83)
  • _INT2, _INT6 — Amiga bus interrupt request lines at levels 2 and 6
  • _RST — Reset signal; can be driven by the expansion card to initiate a system reset
  • _HLT — Halt signal; asserted to suspend CPU bus activity
  • _BERR — Bus Error: informs the CPU that the current bus cycle has failed
  • _AVEC — Autovector input; causes the CPU to generate an internal interrupt vector rather than fetching one from the bus
  • SIZE1, SIZE0 — Transfer size outputs from the CPU indicating byte, word, or longword transfer (pins 89–90)
  • _RMC — Read–Modify–Write Cycle indicator (pin 106); used by the CPU during atomic operations
  • _BR, _BG — Bus Request and Bus Grant for slot-specific bus arbitration (pins 111–112)
  • _BOSS — Indicates that an accelerator card has taken over as the system’s active processor (pin 114)
  • _FPUCS — Chip select for an optional floating-point unit on the expansion card (pin 115)
  • _FPUSENSE — Sense line used to detect whether an FPU is fitted (pin 116)
  • CPUCKLA — 14 MHz CPU clock output from the motherboard to the expansion card (pin 99)
  • CCKA — Colour clock signal at approximately 3.58 MHz (pin 117)
  • ECLOCK — E-clock pulse compatible with 6800-family peripheral timing (pin 100)
  • _RESET — Motherboard reset line (pin 118); distinct from _RST
  • _NETCS — Chip select for on-board network/ethernet circuitry (pin 121)
  • _SPARECS — Spare chip select available for expansion use (pin 122)
  • _RTCCS — Chip select for the real-time clock (pin 123)
  • _FLASH — Chip select for flash ROM (pin 124)
  • _REG — Register select signal (pin 125)
  • _CCENA — Colour clock enable (pin 126)
  • _WAIT — Wait state request input (pin 127)
  • _KBRESET — Keyboard reset signal (pin 128)
  • _IORD, _IOWR — I/O read and write strobes (pins 129–130)
  • _OE — Output enable for memory or bus buffers (pin 131)
  • _WE — Write enable for memory (pin 132)
  • _OVR — DTACK Override; allows an expansion card to suppress the default bus termination (pin 133)
  • XRDY — External Ready; asserts readiness to the CPU (pin 134)
  • _ZORRO — Indicates a Zorro-compatible expansion card is present (pin 135)
  • _WIDE — Signals that the expansion card uses a wide (32-bit) data bus (pin 136)
  • SYSTEM1, SYSTEM0 — System ground reference signals (pins 141–142)
  • _xRxD, _xTxD — Auxiliary serial receive and transmit lines (pins 143–144)
  • _CONFIG OUT — AutoConfig daisy-chain output; passed to the next expansion device in the chain (pin 145)
  • AGND — Analogue ground reference for audio circuitry (pin 146)
  • ALEFT, ARIGHT — Left and right analogue audio signals (pins 147–148)
  • +5V — 5 V DC supply (11 pins, up to 250 mA total to expansion card)
  • +12V — +12 V DC supply (1 pin, up to 25 mA)
  • −12V — −12 V DC supply (1 pin, up to 25 mA)
  • GND — Digital ground (11 pins)

References

Category:Buses Connectors