PC Card

PC Card (PCMCIA) is a 68-pin, 1.27 mm pitch card-edge interface for laptops, supporting 16-bit and 32-bit CardBus modes up to 132 MB/s.

PC Card (originally PCMCIA) is a credit-card-sized expansion interface developed for laptop computers and embedded systems, governed by the PC Card Standard published by PCMCIA/JEITA. The connector is a 68-pin card-edge type arranged in two rows of 34 contacts at 1.27 mm (0.050 in) pitch; all card types share the same 85.6 mm × 54.0 mm footprint, differing only in thickness (Type I: 3.3 mm, Type II: 5.0 mm, Type III: 10.5 mm). The original 16-bit mode (PCMCIA 2.x) supports 5 V or 3.3 V Vcc with an 8- or 16-bit data bus, whilst the 32-bit CardBus extension (introduced in PC Card Standard 5.0, 1995) operates at 3.3 V only, 33 MHz, with bus mastering delivering up to 132 MB/s. The final edition, PC Card Standard Release 8.0 (PCMCIA/JEITA, April 2001), added the CardBay interface, a 1.8 V Vcore definition, and a redefined Vpp.

68 PIN MALE Connector at the controller

68 PIN FEMALE Connector at the peripherals

PC Card connector diagram

PinMemoryI/O+MemDescription
1GNDGNDGround
2D3D3Data 3
3D4D4Data 4
4D5D5Data 5
5D6D6Data 6
6D7D7Data 7
7CE1#CE1#
8A10A10Address 10
9OE#OE#Output Enable
10A11A11Address 11
11A9A9Address 9
12A8A8Address 8
13A13A13Address 13
14A14A14Address 14
15WE#WE#Write Enable ???
16READYIREQ#
17VccVccVcc
18Vpp1Vpp1Vpp1
19A16A16Address 16
20A15A15Address 15
21A12A12Address 12
22A7A7Address 7
23A6A6Address 6
24A5A5Address 5
25A4A4Address 4
26A3A3Address 3
27A2A2Address 2
28A1A1Address 1
29A0A0Address 0
30D0D0Data 0
31D1D1Data 1
32D2D2Data 2
33WPIOIS16#
34GNDGNDGround
35GNDGNDGround
36CD1#CD1#Card Detect 1
37D11D11Data 11
38D12D12Data 12
39D13D13Data 13
40D14D14Data 14
41D15D15Data 15
42CE2#CE2#
43VS1#VS1#
44RSRVDIORD#Reserved / IORD#
45RSRVDIOWR#Reserved / IOWR#
46A17A17Address 17
47A18A18Address 18
48A19A19Address 19
49A20A20Address 20
50A21A21Address 21
51VccVccVcc
52Vpp2Vpp2Vpp2
53A22A22Address 22
54A23A23Address 23
55A24A24Address 24
56A25A25Address 25
57VS2#VS2#
58RESETRESETReset
59WAIT#WAIT#
60RSRVDINPACK#Reserved / ???
61REG#REG#
62BVD2SPKR#Battery Voltage 2 / Speaker ???
63BVD1STSCHG#Battery Voltage 1 / ???
64D8D8Data 8
65D9D9Data 9
66D10D10Data 10
67CD2#CD2#
68GNDGNDGround

Notes

  • The connector is a 68-pin card-edge type with two rows of 34 contacts at 1.27 mm (0.050 in) pitch.
  • All PC Card types (I, II, III) use the same 68-pin connector and 85.6 mm × 54.0 mm card footprint; only the card thickness differs.
  • CardBus (32-bit) cards carry a gold ridge on the dorsal surface and use a shallower keying notch that prevents their insertion into sockets which support only 16-bit cards.
  • Vcc (pins 17 and 51) is 5 V in legacy 16-bit mode or 3.3 V in 3.3 V 16-bit and CardBus modes.
  • Vpp1 (pin 18) and Vpp2 (pin 52) are optional programming-voltage rails; +12 V is applied if flash programming requires it, otherwise they track Vcc or are left unconnected.

Signals

  • GND — Signal and power ground (pins 1, 34, 35, 68).
  • D0–D15 — 16-bit bidirectional data bus (D8–D15 used only in 16-bit word-wide accesses).
  • A0–A25 — 26-bit address bus; enables up to 64 MB of linear address space in memory-mapped mode.
  • CE1# — Card Enable 1; selects the card for even-address (low byte) accesses.
  • CE2# — Card Enable 2; selects the card for odd-address (high byte) accesses in 16-bit mode.
  • OE# — Output Enable; strobes data onto the bus during a memory read cycle.
  • WE# — Write Enable; strobes data into the card during a write cycle.
  • READY / IREQ# — In memory mode: READY indicates the card can complete the current cycle. In I/O mode: IREQ# is the interrupt request line to the host.
  • Vcc — Supply voltage; 5 V or 3.3 V depending on card and host voltage sense negotiation (pins 17 and 51).
  • Vpp1 / Vpp2 — Optional programming voltage rails (pins 18 and 52); typically +12 V for flash erase/program, otherwise tied to Vcc or left unconnected.
  • RESET — Host-driven reset; forces the card to its initialised state.
  • WAIT# — Card-driven wait state insertion; extends bus cycles when the card cannot complete in time.
  • REG# — Attribute Memory Select; distinguishes accesses to the card’s CIS (Card Information Structure) attribute space from common memory.
  • CD1# / CD2# — Card Detect 1 and 2; pulled low by the card to signal physical presence to the host socket controller.
  • WP / IOIS16# — In memory mode: Write Protect (indicates card is write-protected). In I/O mode: IOIS16# signals that the addressed I/O resource is 16-bit wide.
  • IORD# — I/O Read strobe (I/O mode only; pin 44 is Reserved in memory mode).
  • IOWR# — I/O Write strobe (I/O mode only; pin 45 is Reserved in memory mode).
  • INPACK# — Input Acknowledge (I/O mode only; pin 60 is Reserved in memory mode); asserted by the card to indicate it is responding to an I/O read.
  • VS1# / VS2# — Voltage Sense pins; the card pulls these to ground in a defined combination to indicate whether it requires 5 V, 3.3 V, or both (pins 43 and 57).
  • BVD1 / STSCHG# — In memory mode: Battery Voltage Detect 1, indicates first-level low-battery warning. In I/O mode: STSCHG# (Status Changed) interrupt line used by modems and similar I/O cards.
  • BVD2 / SPKR# — In memory mode: Battery Voltage Detect 2, indicates second-level (critical) low-battery warning. In I/O mode: SPKR# carries an audio signal routed to the host speaker.
  • RSRVD — Reserved pins (memory mode); must be left unconnected by the card.

References

Category:Buses Connectors