The Apple 168-pin DIMM is a Fast Page Mode (FPM) and Extended Data Out (EDO) DRAM memory module used in the Power Macintosh 7200, 7300, 7500, 7600, 8500, and 9500 desktop computers (1995–1997). It uses the JEDEC MO-161 mechanical outline — a 133.35 mm edge connector with 1.27 mm (50-mil) contact pitch — and implements the JEDEC JESD21-C 168-pin 8-byte DRAM DIMM electrical standard. The 64-bit data bus operates at 3.3 V or 5 V depending on the model; all modules must meet a 70 ns or faster access time. The Power Macintosh 7200 and 7300 require strictly FPM DIMMs (EDO must not be used in these models as it risks logic board damage), whilst the 7500, 7600, 8500, and 9500 accept both FPM and EDO.
- DIMM = Dual Inline Memory Module
- DRAM = Dynamic Random Access Memory
168-pin connector
| Pin | Signal | Pin | Signal |
|---|---|---|---|
| 1 | VSS | 85 | VSS |
| 2 | DQ(0) | 86 | DQ(32) |
| 3 | DQ(1) | 87 | DQ(33) |
| 5 | DQ(3) | 89 | DQ(35) |
| 6 | VCC | 90 | VCC |
| 7 | DQ(4) | 91 | DQ(36) |
| 8 | DQ(5) | 92 | DQ(37) |
| 9 | DQ(6) | 93 | DQ(38) |
| 10 | DQ(7) | 94 | DQ(39) |
| 11 | Reserved | 95 | Reserved |
| 12 | VSS | 96 | VSS |
| 13 | DQ(8) | 97 | DQ(40) |
| 14 | DQ(9) | 98 | DQ(41) |
| 15 | DQ(10) | 99 | DQ(42) |
| 16 | DQ(11) | 100 | DQ(43) |
| 17 | DQ(12) | 101 | DQ(44) |
| 18 | VCC | 102 | VCC |
| 19 | DQ(13) | 103 | DQ(45) |
| 20 | DQ(14) | 104 | DQ(46) |
| 21 | DQ(15) | 105 | DQ(47) |
| 22 | Reserved | 106 | Reserved |
| 23 | VSS | 107 | VSS |
| 24 | Reserved | 108 | Reserved |
| 25 | Reserved | 109 | Reserved |
| 26 | VCC | 110 | VCC |
| 27 | /WE(0) | 111 | Reserved |
| 28 | /CAS(0) | 112 | /CAS(1) |
| 29 | /CAS(2) | 113 | /CAS(3) |
| 30 | /RAS(0) | 114 | Reserved |
| 31 | /OE(0) | 115 | Reserved |
| 32 | VSS | 116 | VSS |
| 33 | A(0) | 117 | A(1) |
| 34 | A(2) | 118 | A(3) |
| 35 | A(4) | 119 | A(5) |
| 36 | A(6) | 120 | A(7) |
| 37 | A(8) | 121 | A(9) |
| 38 | A(10) | 122 | A(11) |
| 39 | A(12) | 123 | A(13) |
| 40 | VCC | 124 | VCC |
| 41 | Reserved | 125 | Reserved |
| 42 | Reserved | 126 | B(0) |
| 43 | VSS | 127 | VSS |
| 44 | /OE(2) | 128 | Reserved |
| 45 | /RAS(2) | 129 | Reserved |
| 46 | /CAS(4) | 130 | /CAS(5) |
| 47 | /CAS(6) | 131 | /CAS(7) |
| 48 | /WE(2) | 132 | /PDE |
| 49 | VCC | 133 | VCC |
| 50 | Reserved | 134 | Reserved |
| 51 | Reserved | 135 | Reserved |
| 52 | DQ(16) | 136 | DQ(48) |
| 53 | DQ(17) | 137 | DQ(49) |
| 54 | VSS | 138 | VSS |
| 55 | DQ(18) | 139 | DQ(50) |
| 56 | DQ(19) | 140 | DQ(51) |
| 57 | DQ(20) | 141 | DQ(52) |
| 58 | DQ(21) | 142 | DQ(53) |
| 59 | VCC | 143 | VCC |
| 60 | DQ(22) | 144 | DQ(54) |
| 61 | Reserved | 145 | Reserved |
| 62 | Reserved | 146 | Reserved |
| 63 | Reserved | 147 | Reserved |
| 64 | Reserved | 148 | Reserved |
| 65 | DQ(23) | 149 | DQ(55) |
| 66 | Reserved | 150 | Reserved |
| 67 | DQ(24) | 151 | DQ(56) |
| 68 | VSS | 152 | VSS |
| 69 | DQ(25) | 153 | DQ(57) |
| 70 | DQ(26) | 154 | DQ(58) |
| 71 | DQ(27) | 155 | DQ(59) |
| 72 | DQ(28) | 156 | DQ(60) |
| 73 | VCC | 157 | VCC |
| 74 | DQ(29) | 158 | DQ(61) |
| 75 | DQ(30) | 159 | DQ(62) |
| 76 | DQ(31) | 160 | DQ(63) |
| 77 | Reserved | 161 | Reserved |
| 78 | VSS | 162 | VSS |
| 79 | PD(1) | 163 | PD(2) |
| 80 | PD(3) | 164 | PD(4) |
| 81 | PD(5) | 165 | PD(6) |
| 82 | PD(7) | 166 | PD(8) |
| 83 | ID(0) | 167 | ID(1) |
| 84 | VCC | 168 | VCC |
Notes
- The connector uses the JEDEC MO-161 mechanical outline: 133.35 mm wide, 1.27 mm (50-mil) contact pitch, with a polarising notch to prevent reversed insertion.
- The 168-pin edge connector carries contacts on both faces (dual in-line), distinguishing it from the single-sided 72-pin SIMM.
- Power Macintosh 7200 and 7300: FPM DIMMs only; installing EDO modules in these models risks damage to the logic board.
- Power Macintosh 7500, 7600, 8500, 9500: both FPM and EDO DIMMs are supported.
- All modules must run at 70 ns access time or faster.
- The PD (Presence Detect) pins encode module capacity and type; the memory controller reads them at boot to configure timing and organisation.
- ID pins carry additional module identification information used by Apple’s memory controller.
- /PDE (Presence Detect Enable) at pin 132 is used to activate the presence-detect circuit.
Signals
- VSS — Ground reference (0 V).
- VCC — Power supply (3.3 V or 5 V depending on Power Macintosh model).
- DQ(0)–DQ(63) — 64-bit bidirectional data bus.
- A(0)–A(13) — Multiplexed row and column address inputs.
- B(0) — Bank select address bit.
- /RAS(0), /RAS(2) — Row Address Strobe, active-low; latches row address on falling edge.
- /CAS(0)–/CAS(7) — Column Address Strobe signals, active-low; used for byte-lane and bank selection.
- /WE(0), /WE(2) — Write Enable, active-low; distinguishes read from write cycles.
- /OE(0), /OE(2) — Output Enable, active-low; enables data output drivers.
- PD(1)–PD(8) — Presence Detect pins; encode module capacity, organisation, and speed for the memory controller.
- ID(0), ID(1) — Module identification pins.
- /PDE — Presence Detect Enable; activates the presence-detect circuit.
- Reserved — Reserved pins; must not be connected.