Apple Macintosh Portable ROM Expansion

50-pin internal ROM expansion connector on the Macintosh Portable, exposing the unbuffered 68HC000 bus at +5 V and 16 MHz for third-party ROM modules.

50 pin Mac Internal ROM Expansion Connector 50 pin Mac Internal ROM Expansion Connector

The Macintosh Portable ROM expansion connector is a 50-pin proprietary internal connector fitted to the Macintosh Portable logic board, allowing additional ROM modules to be installed alongside the system ROM. It operates at +5 V and 16 MHz and exposes the unbuffered Motorola 68HC000 address bus (A1–A23) and data bus (D0–D15). The chip-select signal /ROM_CS covers the address range $900000–$9FFFFF, permitting ROM expansion up to 4 MB. The connector is physically distinct from the Macintosh Portable RAM expansion connector, which is also 50-pin but includes a notch to prevent confusion between the two.

PinSignalDescription
1+5VVcc
2-24A1-A23Unbuffered 68HC000 address signals A1-A23
25-26GNDLogic Ground
27/DTACK/DTACK input to 68HC000
28/AS68HC000 address strobe signal
29/ROM_CSPermanent ROM chip select signal. Selects in range $90 0000 through $9F FFFF
3016MHz_Clock16 MHz system Clock
31/EXT_DTACKExternal /DTACK signal that disables main system /DTACK
32/DELAY_CSThis signal is generated by the addressing PAL and is used to put the ROM board into the idle mode by inserting multiple wait states
33-48D0-1568HC000 unbuffered data signals D0-15
49-50+5VVcc

Notes

The ROM expansion connector and the RAM expansion connector on the Macintosh Portable are both 50-pin internal connectors. The RAM connector carries a physical notch that distinguishes it from the ROM connector; the two must not be interchanged. The ROM connector carries unbuffered signals directly from the 68HC000 processor and operates at the 16 MHz system clock frequency. Logic levels are +5 V throughout.

Signals

  • +5V — +5 V power supply (Vcc); present on pins 1, 49, and 50
  • A1–A23 — Unbuffered address lines from the 68HC000 processor (pins 2–24); 23 address lines providing up to 8 MB addressable space per bank
  • GND — Logic ground (pins 25–26)
  • /DTACK — Data transfer acknowledge input to the 68HC000; asserted by the ROM board when a bus cycle completes
  • /AS — Address strobe from the 68HC000; indicates that a valid address is present on the bus
  • /ROM_CS — Permanent ROM chip select; asserted for accesses in the range $900000–$9FFFFF; generated by the system PAL logic
  • 16MHz_Clock — 16 MHz system clock signal supplied to the ROM expansion board
  • /EXT_DTACK — External data-transfer acknowledge; when asserted by the ROM board, it suppresses the main system /DTACK, allowing the board to control bus timing
  • /DELAY_CS — Generated by the addressing PAL; places the ROM board into idle mode by inserting multiple wait states
  • D0–D15 — Unbuffered 16-bit data bus signals from the 68HC000 (pins 33–48)

References

Category:Memory Connectors