ZX Spectrum ULA

The Uncommitted Logic Array (ULA) is the Ferranti-manufactured custom chip designated IC1 on the Sinclair ZX Spectrum 48K main board. Introduced with the original 48K model in 1982 and revised across board Issues 1 through 6A, it combines several functions in a single device: generation of the CPU clock (CK), PAL composite video output (luminance /Y and colour-difference signals U and V), keyboard matrix scanning, the tape and loudspeaker analogue interface, and decoding of the single ULA I/O port at address 0xFE. The 48K ULA was produced in several variants — 5C102E (Issues 1 and 2, with a known contention timing fault), 5C112 series, and 6C001E-5/6/7 (mainstream Issues 3–6A) — each a Ferranti custom part with no publicly available manufacturer datasheet; the Sinclair 48K Service Manual is the authoritative board-level reference. The 128K machine uses a revised ULA (Ferranti 7K010E-5 or Amstrad 40056 equivalent) that generates RGB and Bright video instead of the Y/U/V composite outputs.

Notes

The ULA is a proprietary Ferranti custom device; no public manufacturer datasheet exists for any variant. Pin assignments documented here are taken from the Sinclair 48K Service Manual board schematics. The chip is operated from a single +5 V regulated supply. The CLOCK output (pin 32) is generated by the ULA from the 14 MHz crystal oscillator (pin 39) and is presented to the Z80 CPU; during accesses to contended memory the ULA stretches clock cycles by inserting wait states, which is the mechanism behind Spectrum contention timing. The /IO-ULA signal (pin 33) is an active-low decode of Z80 I/O bus cycles targeting port address 0xFE; it enables the ULA’s single I/O port, which controls the border colour, the loudspeaker, and the tape output, and reads keyboard rows and the tape input. Pin 38 (/MREQ) function is not documented in the available board schematics. Pins 1 and 40 are unlabelled in the service manual schematics.

Signals

• /WR — Z80 write strobe; active low, asserted by the CPU during write bus cycles
• /RD — Z80 read strobe; active low, asserted by the CPU during read bus cycles
• /WE — write enable output from the ULA, used for DRAM write control
• A0–A6 — lower seven bits of the Z80 address bus, used by the ULA for I/O port decoding and DRAM multiplexed addressing
• /INT — maskable interrupt request output; the ULA generates a /INT pulse each video frame (50 Hz) to drive the display timing interrupt
• +5V — regulated +5 V supply; one supply pin is decoupled via an RC low-pass filter for noise isolation
• U, V — PAL colour-difference analogue outputs for the composite video signal (48K only; absent on 128K ULA)
• /Y — inverted luminance and sync composite video output (48K only)
• D0–D7 — bidirectional Z80 data bus; the ULA drives these lines during I/O reads from port 0xFE
• T0–T4 — keyboard matrix row inputs; five lines returning the state of the keyboard matrix half-rows scanned by the ULA
• SOUND — analogue signal line shared between the loudspeaker drive (beeper), cassette tape output, and tape input (EAR/MIC)
• CLOCK — CPU clock output generated by the ULA; nominally 3.5 MHz derived from the 14 MHz crystal; gated during contended-memory accesses to introduce wait states
• /IO-ULA — active-low ULA I/O port select, asserted when A0 is low and /IORQ is active; decodes Z80 I/O port 0xFE
• /ROM CS — active-low chip-select output to the on-board ROM; can be overridden externally via the ROMCS line on the expansion connector
• /RAS — row address strobe output to the DRAM array; the ULA multiplexes address lines for DRAM refresh and access cycles
• A14, A15 — upper address bus bits passed to the ULA for page and bank decode logic
• /MREQ — memory request signal; function at this ULA pin is not documented in the available schematics
• Q — connection to the 14 MHz crystal oscillator; the other crystal terminal is grounded through a capacitor

References

• Sinclair ZX Spectrum 48K Service Manual
• ZX Spectrum 128 Service Manual

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