PCI Express 1x - 164 pin Female Connector
PCI Express was introduced to overcome the limitations of the original PCI bus. Developed and released by Intel over a decade ago, the original PCI bus operated at 33MHz and 32 bits with a peak theoretical bandwidth of 132MB per second. It used a shared bus topology - bus bandwidth is shared among multiple devices - to enable communication among the different devices on the bus.
Pin | Side B Connector | Side A Connector |
---|---|---|
# | Name | Description |
1 | +12v | +12 volt power |
2 | +12v | +12 volt power |
3 | RSVD | Reserved |
4 | GND | Ground |
5 | SMCLK | SMBus clock |
6 | SMDAT | SMBus data |
7 | GND | Ground |
8 | +3.3v | +3.3 volt power |
9 | JTAG1 | +TRST# |
10 | 3.3Vaux | 3.3v volt power |
11 | WAKE# | Link Reactivation |
12 | RSVD | Reserved |
13 | GND | Ground |
14 | HSOp(0) | Transmitter Lane 0, Differential pair |
15 | HSOn(0) | GND |
16 | GND | Ground |
17 | PRSNT#2 | Hotplug detect |
18 | GND | Ground |
19 | HSOp(1) | Transmitter Lane 1, Differential pair |
20 | HSOn(1) | GND |
21 | GND | Ground |
22 | GND | Ground |
23 | HSOp(2) | Transmitter Lane 2, Differential pair |
24 | HSOn(2) | GND |
25 | GND | Ground |
26 | GND | Ground |
27 | HSOp(3) | Transmitter Lane 3, Differential pair |
28 | HSOn(0) | GND |
29 | GND | Ground |
30 | RSVD | Reserved |
31 | PRSNT#2 | Hot plug detect |
32 | GND | Ground |
33 | HSOp(4) | Transmitter Lane 4, Differential pair |
34 | HSOn(4) | GND |
35 | GND | Ground |
36 | GND | Ground |
37 | HSOp(5) | Transmitter Lane 5, Differential pair |
38 | HSOn(5) | GND |
39 | GND | Ground |
40 | GND | Ground |
41 | HSOp(6) | Transmitter Lane 6, Differential pair |
42 | HSOn(6) | GND |
43 | GND | Ground |
44 | GND | Ground |
45 | HSOp(7) | Transmitter Lane 7, Differential pair |
46 | HSOn(7) | GND |
47 | GND | Ground |
48 | PRSNT#2 | Hot plug detect |
49 | GND | Ground |
50 | HSOp(8) | Transmitter Lane 8, Differential pair |
51 | HSOn(8) | GND |
52 | GND | Ground |
53 | GND | Ground |
54 | HSOp(9) | Transmitter Lane 9, Differential pair |
55 | HSOn(9) | GND |
56 | GND | Ground |
57 | GND | Ground |
58 | HSOp(10) | Transmitter Lane 10, Differential pair |
59 | HSOn(10) | GND |
60 | GND | Ground |
61 | GND | Ground |
62 | HSOp(11) | Transmitter Lane 11, Differential pair |
63 | HSOn(11) | GND |
64 | GND | Ground |
65 | GND | Ground |
66 | HSOp(12) | Transmitter Lane 12, Differential pair |
67 | HSOn(12) | GND |
68 | GND | Ground |
69 | GND | Ground |
70 | HSOp(13) | Transmitter Lane 13, Differential pair |
71 | HSOn(13) | GND |
72 | GND | Ground |
73 | GND | Ground |
74 | HSOp(14) | Transmitter Lane 14, Differential pair |
75 | HSOn(14) | GND |
76 | GND | Ground |
77 | GND | Ground |
78 | HSOp(15) | Transmitter Lane 15, Differential pair |
79 | HSOn(15) | GND |
80 | GND | Ground |
81 | PRSNT#2 | Hot plug present detect |
82 | RSVD#2 | Hot Plug Detect |
References
- Intel® Developer Network for PCI Express Architecture (contains a lot of technical documents)
- Ineerfacebus.com: PCI Express Bus Description
- National Instruments: Introduction to PCI Express