9 pin D-SUB male connector at the computer
RS-232 (TIA/EIA-232-F) is an unbalanced, single-ended serial interface that represents a logic-1 (mark) as a voltage between −5 V and −15 V and a logic-0 (space) as +5 V to +15 V, measured at the driver output. Microcontroller UARTs — commonly labelled SCI, COM, or ASYNC ports — operate at TTL or CMOS levels (0 V and +5 V, or 0 V and +3.3 V) with opposite polarity: logic-1 is the high voltage and logic-0 is 0 V. A level-shift converter is therefore required to bridge the two domains. The canonical solution is the MAX232 and its derivatives: powered from a single +5 V supply, the IC uses a dual charge-pump to generate approximately ±9 V internally, then uses those rails to drive RS-232-compliant outputs and to shift incoming RS-232 signals back to TTL levels. Two independent driver/receiver pairs are integrated in a single 16-pin package, and the device meets or exceeds TIA/EIA-232-F and ITU V.28. Modern designs operating at 3.3 V use the MAX3232 or similar low-voltage variants that accept a 3.3 V supply yet still produce RS-232-compliant swing.
Notes
- The DE-9 (9-pin D-sub) connector is the standard RS-232 interface on the computer side; pin 2 carries RxD, pin 3 TxD, and pin 5 GND.
- RS-232 receiver thresholds are +3 V (space) and −3 V (mark), giving a minimum 2 V noise margin against the TTL transition levels.
- The MAX232 requires four external 1 µF charge-pump capacitors and supports a maximum data rate of 120 kbit/s.
- The signal polarity inversion between RS-232 and TTL is handled transparently by the level-shift IC; no software adjustment is needed.
- For 3.3 V microcontrollers, use a 3.3 V-supply variant (e.g. MAX3232) to keep logic levels within the UART’s absolute-maximum input ratings.
References
- MAX232 Dual EIA-232 Driver/Receiver — Texas Instruments product page
- Interface Circuits for TIA/EIA-232-F (SLLA037A) — Texas Instruments application note