JTAG Header for FPGA/CPLD Applications (Comcom Electronics Standard)

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connector wiring scheme

Pin Name Direction Description
1 TCK OUT Test Clock
2 GND - Ground
3 TDI OUT Test Data Input
4 GND - Ground
5 TDO IN Test Data Output
6 VCC - Power Supply
7 TMS OUT Test Mode Select
8 TRS OUT Test Reset

Notes

References

Category:Computer Peripheral Connectors

 

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